When large numbers of unique signal connections are required to interconnect the elements of an electrical network, such as the signal inputs and outputs of crosspoint switch elements or devices, the connection of the inputs and outputs to the switch device can require extensive circuit board complexity and interconnection distance design to provide the conductor paths on the circuit board necessary to make the interconnections. Further complications result from the requirement that in many cases, conductor paths between related inputs and connections to the crosspoint switching device be of equal length to make sure that all signals reaching the switching device are delayed by approximately the same amount of time.
This requirement for large numbers of unique signals exists in several environments but is very prevalent in the area of parallel processing. When a computer is comprised of several processors operating simultaneously, the signals to and from each other or shared memory through a switch network necessitates many point-to-point connections and must all be timed to arrive at the receiving device at approximately the same time, and all the processors must be able to access the memory which is common to all processors.
The cost of the interconnection of the crosspoint switching chips or devices to the input and output signal boards can become a significant cost element in an overall system.
U.S. Pat. No. 3,368,155, to N. E. Hoffman addresses the need to package several circuit boards in a module. This approach does not address the need for large numbers of unique signals needed in the environment of the invention.
U.S. Pat. No. 4,401,351 to G. C. Record discloses a card cage approach to interconnecting several circuit boards to a mother board, but fails to disclose a further interconnection by orthogonal plugging of other boards. Mother boards in adjacent cages are connected by a coupling means.
U.S. Pat. No. 4,490,000 to J. C. Asick et al discloses a device for interconnecting two adjacent parallel circuit boards but does not disclose the orthogonal interconnection of circuit boards.
U.S. Pat. No. 4,582,386 to J. D. Martins discloses a circuit board connector which provides electrical connections to a mating connector portion which has a pattern of four rows of pins uniformly spaced. Another example of a connector having receptors for pins and having multiple rows of receptors is U.S. Pat. No. 4,932,885 to J. P. Scholz.